IT systems transmit information in bits, defined by the comparison of a clock signal and the data line. Some systems use synchronous communication, where one wire is specifically responsible for the common clock signal, while others operate asynchronously, where the devices sending and receiving the data synchronise their internal clocks. Data transmission can be either serial (e.g. USB) or parallel (e.g. PCI), depending on how many wires are involved in the information transfer at the same time. Three common serial communication protocols in embedded systems are UART, I2C (or TWI) and SPI.
Universal Asynchronous Receiver-Transmitter is an asynchronous serial communication protocol in which two wires (RX and TX) transmit data. There is no common clock signal between the transmitter and receiver, the transmission rate is decided in advance (baud rate). The data frame typically consists of a start bit, then a sequence of data bits, an optional parity bit and a stop bit. It has the disadvantage that it is only suitable for communication between two devices and does not support multi-device bus systems.
Inter-Integrated Circuit is a two-wire synchronous serial master-slave communication protocol often used to connect sensors, memory chips and other peripherals. The two wires are SDA (data) and SCL (clock), through which the master device controls the transmission of data. I2C allows multiple devices to be connected to a common bus. It uses minimal wiring and has addressing-based multi-device support.
Serial Peripheral Interface is a high-speed, synchronous serial communication protocol used for applications requiring high throughput. It is capable of simultaneous back-and-forth communication (called full-duplex) like UART and has a similar master-slave architecture to I2C. It requires four wires, namely SCLK (clock), MOSI (master out, slave in), MISO (master in, slave out) and CS (chip select). It is often used to communicate with displays, flash memories or sensors requiring higher data transfer rates. A significant disadvantage is that SPI is not a fixed standard, manufacturers may modify it, making it more difficult to use.
Noise, interference, or timing errors during data transmission may cause the receiver device to get incorrect data. Error detection procedures are used to identify this, one of which is a quick and simple method called checksum, while another more complex but more effective method is CRC (Cyclic Redundancy Check).
It is a simple error detection method in which the sum of transmitted bytes is calculated and then sent as part of each data packet by the transmitter. The receiver also calculates the sum and compares it with the received value. If there is a difference, the data is corrupted. Its advantage is its simple implementation and low computational requirements, but its disadvantage is that it cannot reliably detect all errors.
It is a more advanced error detection algorithm based on polynomial division. A CRC code is added to the data stream, which is also recalculated by the receiving device. CRC is highly effective in detecting single-bit and multi-bit errors, as well as bit shifts. Many communication protocols (e.g., CAN, Ethernet) use CRC to increase data transfer security.